This is my PDP-11/44 system.
DIGITAL introduced the PDP-11/44 in November 1979.
The PDP-11/44 incorporates the complete PDP-11/70 instruction set and memory expansion of 1 Mb in a single low-cost package.
The PDP-11/44 was the last PDP-11 implemented in discrete logic.
At this moment I have the following peripherals connected to my PDP-11/44 system.
Jumps within this page are the following.
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|PDP-11/44 programmer's console switch|
| HALT/CONT/BOOT |
This is a 3-position toggle switch with the follong positions.
|PDP-11/44 programmer's console indicators|
- The processor is executing instructions.
- The processor is halted.
- Indicates DC power is present and all voltages are within the specified levels.
- Indicates one or more of the voltages is not within the specified levels.
- The DC power is off.
- Battery is present and charged to 90% or greater capacity.
Used only when the battery backup unit (H7750) is installed.
- Battery is at less than 90% capacity and is charging.
- The AC power has failed, discharging, memory contents are valid.
- Battery is fully discharged or not present.
Memory locations will be destroyed when the AC power fails.
- CPU is under control of the remote diagnostic unit.
- CPU is not being accessed by the remote diagnostic unit.
The power switch is a 4-position rotary keyswitch with the following positions.
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Next to the 11/44 processor backplane is a DD11-DK 9-slot backplane and a DD11-CK 4-slot backplane. The DD11-CK is only connected to the power supply at the rear side, but does not hold any modules (at this moment). In the DD11-DK are not all slots used, so the empty slots either have a G727A or a G7273 FlipChip installed for bus continuity. The following options complete this PDP-11/44 configuration :
|C-F||M7522||RUX50 - UNIBUS RX50 floppy controller|
|2||A-F||M7762||RL11 - RL01 / RL02 controller|
|3||A-F||MDZ-11||MDB Systems 8 UARTs|
|D||G727A||UNIBUS grant continuity FlipChip|
|C-F||M7547||TUK50 - UNIBUS TK50 controller|
|7||A-F||M7486||UDA50 "D" processor module|
|8||A-F||M7485||UDA50 "U" processor module|
|9||A-B||M9302||UNIBUS terminator module|
|C-F||G7273 [M7454]||NPR / grant continuity [for later: TU80 controller]|
I have cut the wire CA1-CB1 on the backplane of the DD11-DK for slot 9, so there must be a G7273 installed in position
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The PDP-11/44 accepts several commands from the system terminal, if the system is in "console mode". When the system is not in console mode, it is in program I/O mode, and data to or from the terminal is controlled by the software currently being executed. You can get into console mode by :
This command prints the 16-bit result of the current address pointer and the last data examined plus 2. The command can be used to calculate the effective address for an instruction using mode 6, register 7 or mode 7, register 7.
The boot command is only possible after the processor is halted. When only "B" is entered without the optional device code, a default boot is done depending on the switches on the UBI (UNIBUS Interface, M7098). The optional device identifier is a
If the processor was halted when the "C" was initiated, the processor will begin operating, and the system will enter the program I/O mode. If the processor was running when the "C" command was initiated, the system will only enter the program I/O mode.
The deposit command will deposit data in the specified address. The address space depends on the qualifiers specified with the command. Initiating deposits while the processor is running is illegal unless the deposit is to the console switch register ("D SW data"). The address can be a one to eight digit octal number, SW or any of the special address characters, and the data in the command can be a one to six digit octal number.
Upon completion of the deposit command, the console will respond with the console prompt (>>>).
Examines are allowed while the processor is running. The console responds to the examine command by printing the 8-digit physical address examined, followed by the 6-digit octal data contained in that location (if the printout is not inhibited by a control character). The address can be a one to eight digit octal number, SW or any of the special address characters. The address is optional. If none is entered, the last address is incremented by 2 or 1 if the /G or /M qualifier is used. Upon completion of the examine command, the console will respond with the console prompt (>>>).
The syntax for the FILL command is "F count", where count is a one to six digit octal number. However, the maximum fill count is 17 (octal). If an number greater than 17 is entered, the fill count is set to 17. After you entered the FILL command, the console will send count NULL characters after each Carriage Return character. "F" immediately followed by a CR resets the count to zero. Upon completion of the fill command, the console will respond with the console prompt (>>>).
The HALT command initiates a halt by asserting the CPU halt request. If the request is honored and the clock is stopped, the console examines register R7 (the PC), then prints 17777707 and the updated PC value. If the processor does not halt within 600 ms, an error message is printed. If the processor is halted when the HALT command is issued, the halt request is not asserted and the console responds with the console prompt (>>>), no error message is issued.
The INITIALIZE command is only valid if the processor is halted. Upon receiving a valid INITIALIZE command, the console issues a UNIBUS initialize. Then the console prints the console prompt (>>>).
This command will repeatedly execute the EXAMINE or DEPOSIT command and is terminated by ^C (Control-C).
The syntax is "R command".
The START command is only valid if the processor is halted. The data, if specified, is a one to six digit octal number that is deposited in the PC when the command is performed. The console responds to a valid START command by issueing an initialize and depositing data into the PC. If no data is specified, the PC is unchanged. Following the initialize and the deposit, the processor continues and the system enters the program I/O mode.
The SELF-TEST command is valid while the processor is running only if no qualifiers are specified. If qualifiers are specified, the processor must be halted. The qualifiers that may be used are /E (test-intensive) or /A (test-extensive-APT). The self-test is executed in response to this command and also upon entry into console mode (via ^P) or processor halt. If the self-test is completed without error, the message (CONSOLE) is printed followed by the console prompt.
If the self-test was entered as a result of a processor halt, then the test is run, the PC is examined, the contents are printed, and the console prompt is printed. If any of the tests being performed detect an error, the appropriate error message is printed and the test program will loop on the error.
If the T/E or T/A command is entered, additional tests are performed along with the self-test. The console responds to the T/E command by printing CONSOLE-TESTB followed by the console prompt.
The T/E and T/A commands modify main memory !
The T/A command restarts the processor after the execution of the command.
| All addresses specified in a console command are assumed to be 22-bit physical
addresses and all data transfers are |
... more to be added ...
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