11/34A     MR11-EA M9312
                  - Bootstrap / terminator

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PDP-11/34A MR11-EA Bootstrap and Terminator module  

identification etch

To see a larger image (size is 80414 bytes)
with the location of the jumpers/switches,
click on the image of the module.

General description of the M9312

The M9312 Bootstrap/terminator module contains a complete set of UNIBUS termination resistors and 512 words of ROM that can be used for diagnostic routines, the console emulation routine and bootstrap programs. The module has 12 jumpers, W1 thu W12, and five sockets to put ROM's in. One socket is used for a diagnostic ROM for the PDP-11/60 or PDP-11/70, or for a ROM that contains the console emulation routine and diagnostics for all other PDP-11's. The other four sockets accept ROM's that contain bootstrap programs.

Diagnostics, bootstrap programs and the console emulator routine are all selectable through the DIP switches on the M9312. The switch settings and addresses depend on the particular socket the ROM's are placed in.
M9312 routines may be initiated in the following ways:

  1. External boot switch. The switch is connected to the M9312 via faston tabs TP1 and TP2.
    The DIP switches are used to select various M9312 routines.
  2. System power-up. This feature is enabled or disabled via DIP switch S1-2.
  3. Programmer console load address and start sequence. The programmer loads the starting address of a routine.
    When the console emulator routine is started, the DIP switch settings determine if diagnostics are run or not.
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Installation of the M9312

Of course, system power should be turned off ....
MR11-EA Bootstrap / Terminator module
  • When a M9312 is used, no other bootstrap module, such as the M9301, may be used.
    Only one M9312 can be used in any given PDP-11 system.
  • In PDP-11/04, 11/34 and 11/34A systems without battery backup, TP4 should not be connected to the processor's power supply battery status signals unless boots on all power restarts are required.
  • On PDP-11 systems containing a UNIBUS repeater, the M9312 must be installed on the processor side of the repeater.
  • In PDP-11 systems that have grant pull-up resistors in the processor module (PDP-11/04, 11/34 and 11/34A) and use the M9312 as the terminator for the processor end, jumpers W1 thru W5 must be OUT.
    All other processors require W1 thru W5 to be IN.
  • Jumper W6 should be IN only when the M9312 is used in PDP-11/55, 11/60 and 11/70 systems that support push-button boot.
  • Jumper W7 must be IN for use in all PDP-11 systems.
  • For PDP-11 systems with at least one peripheral device whose UNIBUS address lies between 765000(8) and 765777(8), jumper W8 must be IN. This prevents the M9312 from responding to these addresses.
  • When the M9312 is used with a PDP-11/60 processor, jumpers W9 and W10 must be OUT, and jumpers W11 and W12 must be IN. For all other PDP-11 systems, jumpers W9 and W10 must be IN and W11 and W12 must be OUT.
  • See DIP switch settings for the switch settings S1-1 thru S1-10 required for various boot configurations.
  • Bootstrap ROM installation must be sequential beginning with ROM location #1 for all PDP-11 systems except the PDP-11/60, whether or not the console emulator ROM is used.
  • In PDP-11/60 systems, when only one boot ROM is used, it must be installed in location #2. If bootstraps are to be started from the console emulator routine, locations #1 and #2 must both contain ROM's. Additional ROM's must be installed first in location #3 and the in location #4.
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Power-up boot enable.

Automatic booting on power-up can be enbled with DIP switch S1-2. When this switch is set to the OFF position the processor will execute its power-up routine normally, obtaining the PC from location 24(8) and the PSW from location 26(8). When the switch is in the ON position during power-up the processor will obtain its PC and PSW from the locations 773024(8) and 773026(8). The address of the DIP switches S1-1 and S1-3 thru S1-10 is 773024(8).
The function of the power-up boot enable switch S1-2 can be duplicated by an external switch connected to the faston tabs TP3 and TP4. A closed switch connected to TP3 and TP4 is equivalent to S1-2 set to ON.
When MOS memory is present with battery backup, a battery status signal is generated by the power supply. This signal should be connected to the power-up boot enable input (TP4). When TP4 is used, DIP switch S1-2 must be OFF.
The faston tabs TP1 thru TP4 are near the handle of the module with TP1 nearest to the edge of the PCB.
    TP1 - boot signal input
    TP2 - boot signal return
    TP3 - power-up boot enable return
    TP4 - power-up boot enable input
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Function of the jumpers on the M9312

W1  connects pull up for BUS BG6 H (when IN)
W2  connects pull up for BUS BG7 H (when IN)
W3  connects pull up for BUS NPG H (when IN)
W4  connects pull up for BUS BG5 H (when IN)
W5  connects pull up for BUS BG4 H (when IN)
W6  connect BUF VECTOR L to finger BD1 (IN for PDP-11/70)
W7  reserved (always IN)
W8  connects LO ROM ENABLE H (when OUT)
  W9, W10    install for power-up boot to 773024(8) (IN for all CPU's except 11/60)
  W11, W12    install for power-up boot to 773224(8) (IN for PDP-11/60 only)

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DIP switch settings and boot ROM's

Console emulator & diagnostics

Socket E20 is reserved for the diagnostics and console emulator ROM.

DIP switch and corresponding bus address bits

M9312 DIP switches
S1 switch          1            3    4    5    6    7    8    9    10    (*)  
    corresponding bus address bits    121110876543210
binary value of switchesxxxxxxxx0
octal value of switchesXYZ

* No switch is provided for setting bit 0.
   Therefore only an even address (for the PC) can be set.

Bootstrap ROM's

    part number    device    mnemonic        unit    CSR
23-751A9 RL01DL0-3    774400    
  RP04/05/06 RM02/03  DB0-7776700
23-758A9TU10 TS03MT0-7772522
LO SPD RDRTTn/a777560


When you click on the part number, a window opens with the DIP switch settings that apply for the ROM.
As the DIP switches set the bootstrap routine start address, the settings differ when the ROM is placed in an other socket.

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Documentation and information

The only documentation I have is the "M9312 bootstrap/terminator module technical manual", EK-M9312-TM-002.
Important to know is that the module draws typical 1.5 Amps from the +5 Volt power supply. This is important because the M9312 must be in the backplane that holds the processor boards as well. When you install the floating point processor and the cache memory option, you must do some power calculations to make sure that you do not overload the +5 Volt power supply.

Also note that the four boot ROM sockets are NOT in the 'normal' order, that is 1-2-3-4. Starting from the edge of the board where the handle is, and going toward the backplane contacts, the order is ROM #1, ROM #3, ROM #2 and finally ROM #4.
Other documentation.

Here is some additional good information from Don North.
The M9312 can be used in most UNIBUS systems, like the PDP-11/04, PDP-11/34, PDP-11/35 (/40), PDP-11/45, PDP-11/60 and PDP-11/70. Note that the PDP-11/44 has the boot ROMs installed on the UBI (UNIBUS Interface) module.
However, these processors do not all terminate all their signals, hence the jumpers on the M9312.
For example, the PDP-11/04 and PDP-11/34 processors electrically terminate only the BG1-4 and NPG lines, the other UNIBUS signals (address, data and control) are not  terminated on the processor and have drivers/receivers only.
The M9312 (and M9301) modules always  electrically terminate the UNIBUS address, data and control lines, except  there are jumpers (W1-W5) that allow selection of whether or not the UNIBUS BG1-4 and NPG signals are electrically terminated.
The M9302 module always  terminates all  UNIBUS signals: address, data, control, and BG1-4 and NPG.
The M9302 also does SACK turnaround, but that is a different story.
So, when the M9312/M9301 manuals talk about "programmable termination", they really only mean BGx and NPG.
The termination of the other UNIBUS signals is not programmable.
What really happens in the PDP-11/34A is the following. So, electrically the UNIBUS is terminated by the M9312 in slot 3 and the M9302 in slot 9. For the specific case of the BGx/NPG signals, they are terminated (pull-up only) at the processor in slot 2 (or slot 1 for the PDP-11/04) and slot 9 at the end of the bus.
Note that the M9312 normally is installed in position A-B, but in the PDP-11/70 processor the M9312 goes into position E-F!

Available diagnostics for the M9312 Bootstrap / Terminator
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