11/44     MFU SLU & DL11-W test ZDLH

ABSTRACT :
This is a logic test for the DL11-W as well as the 11/44 MFU SLU (serial line unit).
The test can optionally check XMIT and RECEIVE with a wrap cable. The UART under test is looped back on itself. Use SW 07 =1 to select this test.
This test is mainly for the console serial line and line clock interface but can test up to 15 additional identically configured DL11's interfaces. Defaults :
    address   177560     vector   60      CONSOLE
    address   177546     vector   100    Clock
    address   176500     vector   300    first of 15 consecutive SLU's

It checks the line clock only of the console device.
The test is able to handle power fails.
The ECHO test (start 204) reads a character from terminal, writes it back and reports any error. Type control-C to stop the ECHO test.

OPERATING PROCEDURES :
200     normal start
204     the ECHO test will be executed
210     starts the terminal output test.

Set switches (use memory location 176 if no hardware SW register).
On 11/44 : type ^P   >>>D SW xxxxxx[CR]     >>>C[CR] (I/O)

SWITCH SETTINGS :
To change software switches (loc 176) type ''control-G'' but as the test is setting the maintenance bit in the console DL11, type ^G during program typeouts at that time the maintenance bit is cleared.
SW 15  =1   halt on error
SW 14  =1   loop on current test
SW 13  =1   inhibit error typeout
SW 10  =1   enable error flags test
SW 09  =1   loop on error
SW 08  =1   enable BREAK function test
SW 07  =1   run data test through loop-back connector
SW 06  =1   inhibit line clock test
SW 05  =1   allow manual setting of DEVICE MAP
SW 04  =1   inhibit SLU test (test only line clock)
SW 03  =1   for 11/44 MFM: enable BREAK and ERROR FLAG
            tests if bit 8 or/and 10 is set
SW 02  =1   11/44 MFM option selects T/A console test
            via wrap cable TU58 - Console [Manufact]

NOTES :
ZDLDC0     this test needs modification for the 11/44
ZDLDD0     does not allow vectors greater than 376
ZDLDE0     has several timing problems on 11/44
ZDLDG0     needs corrections for 11/24

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